1. Field of the Invention
The present invention relates generally to a semiconductor device and, more particularly, to a low-resistance contact structure and a method of making the same.
2. Description of the Prior Art
As the size of the integrated circuit devices continues to scale down, the polysilicon gate and the silicon dioxide insulating layer of a metal-oxide-semiconductor field effect transistor (MOSFET) structure have been confronted with the physical limits of the material itself. To meet the demands of scalability, it is necessary to incorporate high-k metal gate (HK/MG) process.
Today, two main integration options remain: gate-first (often referred to as MIPS, metal inserted poly-silicon) and gate-last (also called RMG, replacement metal gate). The terminology “first” and “last” refers to whether the metal electrode is deposited before or after the high temperature activation anneal of the flow. The replacement metal gate (RMG) process flow allows the use of aluminum as a conductor material.
Typically, the M0 contact is fabricated after the RMG process. Currently, a so-called Self-Aligned Contact (SAC) is employed. However, this technical field still encounters some problems even after the SAC technique and metal gate scheme are introduced.
For example, as the gap between the gate structures is less than a certain dimension, e.g., 10 nm, the SAC structure manufactured by existing processes may not satisfy the electrical requirements. Process misalignment leads to laterally offset of the SAC structure. When the SAC structure deviates from a predetermined position, the contact area between the SAC structure and the active region below will be reduced, resulting in significant increase of contact resistance (Rc).